
When a board has several voltage requirements and a limited layer stack, power nets will be “jigsawed” together on shared planes. “PCB designers can be slammed with more than 30 power distribution networks, requiring split power planes, networks arranged like jigsaw puzzle pieces, and still the requirement to keep nets around their respective ICs and connected to the power inputs,” Isaac explained. The HyperLynx PI tool was created for designers to evaluate and mesh these power requirements, reducing the need for decoupling capacitators, shortening design times and eliminating respins, and improving signal integrity.

Two common problems can be discovered and resolved with power integrity analysis: DC voltage drop and current density issues. The HyperLynx PI tool illustrates power distribution networks in such a way that either of these design setbacks is easily found and dealt with. For DC voltage drop, ICs placed a certain distance from the power source are not getting their required voltage. Voltage planes are irregular and full of holes, Isaac notes, and a 1.3 V power source on the bottom left side of the PCB, for example, might go through a 1.2 V power distribution network and lose enough current to fall below the tolerances (typically ±10% for the 1.2-V IC on the right side of the board. The under-voltage condition can cause a variety of IC errors from bit errors to complete failure. Designers can use HyperLynx PI’s color-key map of the board to determine where too little power is getting through, and adjust the bill of materials (BOM), PCB layout, or other elements to improve the design.

HyperLynx 3D current density plot: a 3D plot of the current density on a plane. Areas of high current density can lead to board damage, disconnected power, and possibly fires.
With current density problems, bottlenecks and hot spots are created by concentrating the flow of power too much in one area of the board. When ICs switch or perform various functions, they create a huge current draw, exposing these density problems. Noise and resonance are created by the current, disrupting optimal operation. Designers might solve this through AC analysis, which leads to layout changes, dropping a via into another layer of the circuit board, or adding decoupling capacitors. In HyperLynx PI, designers can again use a color-key map to identify problem areas then try out different solutions, or combinations of solutions. These can be brainstorming sessions, worked out before physical design even begins. Just as good design can be the foundation of good assembly and test, good PCB planning is the foundation of smart, optimized physical board layouts.
Mentor Graphics made the HyperLynx PI tool to cooperate with its signal integrity analysis software suite, HyperLynx SI, recognizing the heightened importance of power in the modern PCB. “Signal and power integrity should be part of the design from the beginning,” Isaac said. The goal of PCB designers should be minimizing layer count, keeping a lid on costs, speeding time-to-market through reduced design time and prototyping, and giving a board the highest possible reliability from the start by managing tolerances and limits. HyperLynx PI was designed to meet all of these goals, and also to be used by typical layout designers and electronic engineers, rather than just power integrity specialists. For more about the tool, see our coverage of the product release, read Mentor Graphics Debuts Power Integrity Analysis.
Meredith Courtemanche, managing editor
Nice post on PCB Designing.
ReplyDeleteWork From Home